What is the System Architecture of Huawei OTN OSN8800?

The OptiX OSN 8800 system uses the L0 + L1 + L2 architecture. Ethernet/MPLS-TP switching is implemented on Layer 2, ODUk/VC switching on Layer 1, and wavelength switching on Layer 0.

System architecture of the OptiX OSN 8800 (MS-OTN) 

System architecture of the OptiX OSN 8800 (OCS) ]

Functions of modules are as follows:

• Optical-layer boards are classified into optical multiplexer and demultiplexer boards, optical add/drop multiplexing (OADM) boards, optical amplifier (OA) boards, optical supervisory channel (OSC) boards, optical spectrum analysis boards, optical variable attenuator boards, and optical power and dispersion equalization boards. These boards are intended to process optical-layer services, for example, to cross-connect wavelengths at the optical layer.
• Electrical-layer boards such as OTU, tributary, and line boards like 40G TN54NS3 are used to process electrical-layer signals, and perform conversion between optical and electrical signals. The OptiX OSN 8800 uses a tributary-line-separate architecture, and a centralized cross-connect unit to flexibly groom electrical-layer signals at different granularities.
• For OptiX OSN 8800, an universal line board is used to process electrical-layer signals and perform conversion between optical and electrical signals. In addition, an universal line board can work with a centralized cross-connect board to achieve hybrid transmission and fine-grained grooming of OTN, SDH, and packet services.
• For OptiX OSN 8800, EoO, EoW, Ethernet over SDH (EoS), and packet boards have L2 processing capabilities. They can add, strip, and exchange MPLS or VLAN tags, learn MAC addresses, and forward packets. Only packet boards can add, strip, or exchange MPLS tags.
• As the control center of the entire system, the system control and communication (TN52SCC) board cooperates with the network management system (NMS) to manage boards in the system and to implement inter-subrack communication.
• The clock board provides system clock signals and frame header signals to each service board, and synchronizes the local system time with the upstream system time, achieving clock and time synchronization.
• The power supply and fan systems with a redundancy protection design ensure highly-reliable equipment operation.
• The auxiliary interface board provides functional ports such as clock/time input/output ports, management serial port, alarm output and cascading ports, and alarm input/output ports.
• Inter-board communication and service cross-connections, clock synchronization, and power supplies are implemented using the backplane buses. Backplane buses include control and communication buses, clock buses, and power buses.